Andes offers a broad portfolio of 30+ silicon-proven processor IP cores, spanning compact 32-bit MCUs to high-performance ...

GPU giant eyes open silicon for edge At the 2025 RISC-V Summit in China, Nvidia dropped a bombshell by revealing that its ...

The move represents a major step by the US semiconductor giant in boosting the development of open-source chip architecture ...

Nvidia's decision to extend support for CUDA to the RISC-V instruction set isn't all that surprising. It's not the first or ...

There's been a flurry of news surrounding RISC-V lately, like Steam support for RISC-V through an emulator and Nvidia's ...

Some high-performance RISC-V processors are in the pipeline for the rest of the year 2025, namely UltraRISC UR-DP1000, Zizhe ...

Open source developers are building an emulator called felix86, which allows you to run x86-designed software on RISC-V ...

ESWIN EBC77 RISC-V SBC launches with Ubuntu 24.04 LTS support but RVA20 profile means it won't run Ubuntu 25.10 or later.

The rise of AI and high-performance computing (HPC) is accelerating the adoption of RISC-V, the open-source instruction set ...

A new technical paper titled “Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems” was published by ...

RISC-V is also being used for custom processors targeted to applications from the network edge to cloud servers with specific applications dedicated to high-performance computing (HPC).

RISC-V’s lack of vector instructions in existing CPUs is part of the reason I’m just not that interested in it right now, outside of softcore implementations. Report comment.