Electronics Weekly

LETI integrates III-V lasers on 200mm wafers using CMOS flow

Leti has integrated hybrid III-V silicon lasers on 200mm wafers using standard CMOS process flow. This shows the way to transitioning away from 100mm wafers and a process based on bulk III-V ...
EDN

Mixed-signal design flow enables RF CMOS chip

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...
EDN

Performance grows with integration

The manufacturing process flow has been designed to allow all standard CMOS steps to occur at the front end of the process, with the micromachining steps performed after the circuitry is completed.
Electronics Weekly

CMOS will cut cost of integrated photonics, says Leti

French research group Leti has demonstrated a III-V semiconductor fabrication technique which it says will simplify the production of lasers. Leti says it has integrated hybrid III-V silicon lasers on ...
Electronic Design

Creating On-Chip MEMS Sensors in CMOS

Nanusens' novel approach to creating nanoscale sensor structures inside the CMOS layers. How the methodology helps shrink cost and size. Previously, MEMS sensors were created by employing proprietary ...
Electronic Design

IEDM sees transistor, memory, laser innovations

The International Electron Devices Meeting (IEDM) held Dec. 2-6, 2017, in San Francisco offered imec and Leti an opportunity to disclose several innovations. imec announced three new developments: ...